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| HT1602L 40 Dot Matrix LCD Segment Driver Features * * * * * Operating voltage: 2.7V~5.5V LCD driving voltage: 3.0V~5.2V Applicable LCD duty from 1/8 to 1/16 Suitable for various types of LCD panel Bias voltage adjustable from an external source Applications * * * Interface with HT163A Electronic dictionaries Portable computers * * Remote controllers Calculators General Description The HT1602L is a dot matrix LCD segment driver LSI implemented in CMOS technology. The chip contains 40-bit shift register (two 20bit shift registers), 40-bit latch (two 20-bit latches), 40-bit level shifter, 40-bit 4-level driver and control circuits. The HT1602L can convert serial data received from an LCD controller parallel data and then send them out as LCD driving waveforms to the LCD panel. The chip is applicable up to 1/16 duty. Furthermore, the bias voltage which determines the LCD driving voltage can be optionally supplied from an external source, thus the chip is suitable for driving various LCD panel. These special features increase the versatility of the chip. Block Diagram 1 27th Aug '98 HT1602L Pad Assignment Chip size: 87 x 74 (mil)2 * The IC substrate should be connected to VSS in the PCB layout artwork. Pad Coordinates Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Unit: m X -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -975.00 -845.00 -715.00 -585.00 Y 780.00 650.00 520.00 390.00 260.00 130.00 0.00 -130.00 -260.00 -390.00 -520.00 -650.00 -780.00 -780.00 -780.00 -780.00 Pad No. 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 X 975.00 975.00 942.50 942.50 942.50 975.00 923.50 975.00 975.00 975.00 975.00 975.00 845.00 715.00 585.00 455.00 Y -713.00 -583.00 -435.50 -305.50 -175.50 -45.50 84.50 239.00 369.00 499.00 629.00 780.00 780.00 780.00 780.00 780.00 2 27th Aug '98 HT1602L Pad No. 17 18 19 20 21 22 23 24 25 26 27 X -455.00 -325.00 -195.00 -65.00 65.00 195.00 325.00 455.00 585.00 715.00 845.00 Y -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 -780.00 Pad No. 44 45 46 47 48 49 50 51 52 53 X 325.00 195.00 65.00 -65.00 -195.00 -325.00 -455.00 -585.00 -715.00 -845.00 Y 780.00 780.00 780.00 780.00 780.00 780.00 780.00 780.00 780.00 780.00 Pad Description Pad No. 1~5 6 7~26 27 28 29 30, 31, 32 33 34 35 36 37 38 39~53 Pad Name Y15~Y19 VDD Y20~Y39 DO39 DI20 DO19 V5, V3, V2 VSS VDD CLK DI0 LOAD ALT Y0~Y14 I/O O -- O O I O I -- -- I I I I O Power supply (postive) Description LCD driver output for segment* LCD driver output for segment Shift register output pad for the 40th bit data Data input pad of shift register 2 Shift register output pad for the 20th bit data LCD bias supply voltage Power supply (ground) Power supply (positive) Clock pulse input pad for the shift register Data input pad of shift register 1 Latching signal to latch shift register data Alternate signal input pad for LCD driving waveform LCD driver output for segment* *: For Y0~Y39, one of VDD, V2, V3 or V5 is selected as a display driving source according to the combination of latched data level and ALT signal. Refer to the following table: Latched Data H ALT H L H L Display data output level V5 VDD V3 V2 L 3 27th Aug '98 HT1602L Absolute Maximum Ratings* Supply Voltage ..............................-0.3V to 6.0V Input Voltage................. VSS-0.3V to VDD+0.3V Storage Temperature................. -50C to 125C Operating Temperature............... -20C to 70C *Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Symbol VDD IOP IDD fLCD twCLK VIL VIH VLCD Ta=25C Parameter Operating Voltage Operating Current Standby Current Clock Frequency Clock Pulse Width "L" Input Voltage "H" Input Voltage LCD Driving Voltage Test Conditions VDD -- 5V 5V 5V 5V 5V 5V 5V Min. 2.7 -- -- 3.3 125 -- 0.7VDD 3 Typ. -- 100 1 -- -- -- -- -- Max. 5.5 300 5 -- -- 0.3VDD -- 5.2 Unit V A A Conditions -- No load -- -- -- -- -- -- MHz ns V V V 4 27th Aug '98 HT1602L Timing Diagrams 1/16 duty and 1/5 bias 5 27th Aug '98 HT1602L Application Circuits 6 27th Aug '98 |
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